Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter

Kai Li; Min Wei; Chuan Xie; Fujin Deng; Josep M. Guerrero; Juan C. Vasquez

doi:10.17775/CSEEJPES.2021.05670

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Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter

Regular Papers | 更新时间：2026-02-06

- Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter
- Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter
- 中国电机工程学会电力与能源系统学报(英文) 2025年11卷第4期页码：1635-1646
- 作者机构：
  
  1. University of Electronic Science and Technology of China,Sichuan,Chengdu,China
  2. Nanchang Automotive Innovation Institute, Tongji University,Nanchang,China
  3. Southeast University,Jiangsu,Nanjing,China
  4. Aalborg University, Aalborg, Aalborg,Denmark
- 作者简介：
- 基金信息：
- DOI：10.17775/CSEEJPES.2021.05670
  中图分类号：
- 纸质出版：2025
- 稿件说明：
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Kai Li, Min Wei, Chuan Xie, 等. Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter[J]. 中国电机工程学会电力与能源系统学报(英文), 2025,11(4):1635-1646.

Kai Li, Min Wei, Chuan Xie, et al. Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter[J]. CSEE Journal of Power and Energy Systems, 2025, 11(4): 1635-1646.
Kai Li, Min Wei, Chuan Xie, 等. Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter[J]. 中国电机工程学会电力与能源系统学报(英文), 2025,11(4):1635-1646. DOI： 10.17775/CSEEJPES.2021.05670.

Kai Li, Min Wei, Chuan Xie, et al. Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter[J]. CSEE Journal of Power and Energy Systems, 2025, 11(4): 1635-1646. DOI： 10.17775/CSEEJPES.2021.05670.

摘要

Abstract

This paper proposes a real-time optimization strategy

aimed at minimizing switching losses in a three-level neutral-point-clamped (3L-NPC) inverter. The proposed strategy consists of optimized clamping strategy and unified triangular carrier based discontinuous pulse width modulation (DPWM) strategy. In each control period

the optimized clamping strategy determines optimal clamped phases and voltage levels to clamp the phase with absolute current as big as possible. Based on obtained optimal results

unified triangular carrier based DPWM strategy calculates the injected common mode voltage (CMV) and generates driving signals for semiconductor switching devices by comparing final modulation signals and two phase-deposited carriers. Analysis and experiment results show the proposed strategy not only can reduce switching losses up to 49.8% compared with conventional space vector PWM (SVPWM) but also has features of low computation burden and easy implementation.

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