Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency

Shulin Zhang; Jinsong Kang; Jiawen Yuan

doi:10.17775/CSEEJPES.2021.03450

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Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency

Regular Papers | 更新时间：2026-10-15

- Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency
- Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency
- 中国电机工程学会电力与能源系统学报(英文) 2025年11卷第4期页码：1915-1925
- 作者机构：
  
  School of Electronic and Information Engineering, Tongji University,Shanghai,China
- 作者简介：
- 基金信息：
- DOI：10.17775/CSEEJPES.2021.03450
  中图分类号：
- 纸质出版：2025-07-01
- 稿件说明：
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Shulin Zhang, Jinsong Kang, Jiawen Yuan. Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency[J]. 中国电机工程学会电力与能源系统学报(英文), 2025,11(4):1915-1925.

Shulin Zhang, Jinsong Kang, Jiawen Yuan. Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency[J]. CSEE Journal of Power and Energy Systems, 2025, 11(4): 1915-1925.
Shulin Zhang, Jinsong Kang, Jiawen Yuan. Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency[J]. 中国电机工程学会电力与能源系统学报(英文), 2025,11(4):1915-1925. DOI： 10.17775/CSEEJPES.2021.03450.

Shulin Zhang, Jinsong Kang, Jiawen Yuan. Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency[J]. CSEE Journal of Power and Energy Systems, 2025, 11(4): 1915-1925. DOI： 10.17775/CSEEJPES.2021.03450.

摘要

Abstract

Three-level Neutral-Point-Clamped (NPC) voltage source inverters (VSIs) have been widely used in application of medium-voltage high-power induction motor drives. Due to the limitation of a switching frequency of several hundred Hz in the high-power drive application

a 4-segment synchronized SVPWM scheme is adopted to reduce output current ripple. However

in the overmodulation region

the 4-segment synchronized SVPWM scheme shows high computation complexity and high current THD. Thus

this paper presents an optimized 4-segment synchronized overmodulation scheme with the advantages of low current harmonics and simple digital realization. Optimized and conventional 4-segment synchronized SVPWM schemes are compared and verified in experimental tests. Experimental results prove the proposed scheme can achieve lower current harmonics and computational burden in the overmodulation region

compared with traditional schemes.

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