To address the issues of a high number of switching devices and non-common ground between input and output in a two-phase interleaved parallel Boost converter based on a capacitance-diode(CD) boost unit

a construction method for a new 3L-type two-phase interleaved parallel Boost converter based on the CD unit is proposed. By introducing different numbers of CD units before and after the third boost inductor

the evolution law of the 3L-type high-gain Boost converters based on FN-BMCD units is derived. The 3L Boost converter based on the F2-B1CD unit is taken as an example

and the operational principle across five switching modes is analyzed in detail

revealing the mechanism by which parasitic parameters of inductors and capacitors affect the voltage gain. A control-in-the-loop semi-physical simulation experimental platform composed of a digital signal processing(DSP) chip and a real-time simulator is built to verify the correctness of the theoretical analysis of the proposed new converter topology.