Issam A. Smadi, Bayan H. Bany Fawaz. DC Offset Rejection in a Frequency-Fixed Second-Order Generalized Integrator-Based Phase-Locked Loop for Single-Phase Grid-Connected Applications[J]. 现代电力系统保护与控制(英文), 2022,7(1):1-13.
Issam A. Smadi, Bayan H. Bany Fawaz. DC offset rejection in a frequency-fixed second-order generalized integrator-based phase-locked loop for single-phase grid-connected applications[J]. Protection and Control of Modern Power Systems, 2022, 7(1): 1-13.
Issam A. Smadi, Bayan H. Bany Fawaz. DC Offset Rejection in a Frequency-Fixed Second-Order Generalized Integrator-Based Phase-Locked Loop for Single-Phase Grid-Connected Applications[J]. 现代电力系统保护与控制(英文), 2022,7(1):1-13.DOI: 10.1186/s41601-021-00223-w.
Issam A. Smadi, Bayan H. Bany Fawaz. DC offset rejection in a frequency-fixed second-order generalized integrator-based phase-locked loop for single-phase grid-connected applications[J]. Protection and Control of Modern Power Systems, 2022, 7(1): 1-13.DOI: 10.1186/s41601-021-00223-w.
DC Offset Rejection in a Frequency-Fixed Second-Order Generalized Integrator-Based Phase-Locked Loop for Single-Phase Grid-Connected Applications
and frequency of the grid voltage is essential for single-phase grid-connected converters. The presence of DC offset in the grid voltage is detrimental to not only grid synchronization but also the closed-loop stability of the grid-connected converters. In this paper
a new synchronization method to mitigate the effect of DC offset is presented using arbitrarily delayed signal cancelation (ADSC) in a second-order generalized integrator (SOGI) phase-locked loop (PLL). A frequency-fixed SOGI-based PLL (FFSOGI-PLL) is adopted to ensure better stability and to reduce the complexity compared with other SOGI-based PLLs. A small-signal model of the proposed PLL is derived for the systematic design of proportional-integral (PI) controller gains. The effects of frequency variation and ADSC on the proposed PLL are considered
and correction methods are adopted to accurately estimate grid information. The simulation results are presented
along with comparisons to other single-phase PLLs in terms of settling time
peak frequency
and phase error to validate the proposed PLL. The dynamic performance of the proposed PLL is also experimentally validated. Overall
the proposed PLL has the fastest transient response and better dynamic performance than the other PLLs for almost all performance indices
offering an improved solution for precise grid synchronization in single-phase applications.
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相关作者
Subrat Kumar Pradhan
Dushmanta Kumar Das
Huabo Shi
Yufei Teng
Zhaohua Hu
Gang Chen
Lijie Ding
Xueyang Zeng
相关机构
Department of Electrical Engineering, Indira Gandhi Institute of Technology, Sarang, Dhenkanal
Department of Electrical and Electronics Engineering, National Institute of Technology Nagaland, Dimapur
State Grid Sichuan Electric Power Research Institute
State Grid Sichuan Electric Power Company
State Key Laboratory of Power Transmission Equipment Technology, School of Electrical Engineering, Chongqing University