Abstract: DC-side neutral-point (NP) potential balancing and zero-sequence circulating currents (ZSCCs)suppression are key to ensure the operation of the paralleled three-level inverters (PTLIs). However, the ZSCCs suppression scheme based on redundant small vector pair adjustment further increases the scenario where the currents entering and exiting the NP of space vector pulse width modulation (SVPWM) cannot be symmetrically eliminated, which aggravates the NP potential imbalance of the PTLIs. In this paper, based on the idea of virtual vector synthesis, we propose a PTLIs virtual vector modulation method that satisfies the requirements of ZSCCs suppression and NP potential balancing. The method redefines the virtual middle vector, reduces the NP current imbalance scenario by shortening the middle vector action time and increasing the symmetric redundant small vectors involved in the synthesis; analyzes the virtual vector synthesis rules under different control objectives in its different sectors, optimizes the action order of the virtual vectors by using the phase duty ratio method, and reduces the number of switches in the vector synthesis process. The comparative analysis of the NP voltage variation with the traditional SVPWM strategy shows that the proposed method can weaken the coupling relationship between the ZSCCs suppression and the NP potential balance. Finally, the effectiveness of the strategy is experimentally verified using the Starsim platform.