王磊, 魏晓光, 唐新灵, 林仲康, 赵志斌, 李学宝. 功率器件封装结构热设计综述[J]. 中国电机工程学报, 2024, 44(7): 2748-2773. DOI: 10.13334/j.0258-8013.pcsee.230136
引用本文: 王磊, 魏晓光, 唐新灵, 林仲康, 赵志斌, 李学宝. 功率器件封装结构热设计综述[J]. 中国电机工程学报, 2024, 44(7): 2748-2773. DOI: 10.13334/j.0258-8013.pcsee.230136
WANG Lei, WEI Xiaoguang, TANG Xinling, LIN Zhongkang, ZHAO Zhibin, LI Xuebao. Review on Thermal Design of Power Device Package Structures[J]. Proceedings of the CSEE, 2024, 44(7): 2748-2773. DOI: 10.13334/j.0258-8013.pcsee.230136
Citation: WANG Lei, WEI Xiaoguang, TANG Xinling, LIN Zhongkang, ZHAO Zhibin, LI Xuebao. Review on Thermal Design of Power Device Package Structures[J]. Proceedings of the CSEE, 2024, 44(7): 2748-2773. DOI: 10.13334/j.0258-8013.pcsee.230136

功率器件封装结构热设计综述

Review on Thermal Design of Power Device Package Structures

  • 摘要: 半导体技术的进步使得芯片的尺寸得以不断缩小,倒逼着封装技术的发展和进步,也由此产生了各种各样的封装形式。当前功率器件的设计和发展具有低电感、高散热和高绝缘能力的属性特征,器件封装上呈现出模块化、多功能化和体积紧凑化的发展趋势。为实现封装器件低电感设计,器件封装结构更加紧凑,而芯片电压等级和封装模块的功率密度持续提高,给封装绝缘和器件散热带来挑战。在有限的封装空间内,如何把芯片的耗散热及时高效地释放到外界环境中以降低芯片结温及器件内部各封装材料的工作温度,已成为当前功率器件封装设计阶段需要考虑的重要问题之一。该文聚焦于功率器件封装结构的散热方面,针对功率半导体器件在散热路径方面的结构设计进行归纳总结。通过对国内外功率器件封装结构设计的综述,梳理功率器件封装结构设计过程中在散热方面的考虑及封装散热特点,并根据功率器件散热特点对功率器件封装结构类型进行分类。最后,基于降低封装结构散热热阻、提高器件散热能力的目的,从高导热封装材料和连接工艺、芯片面接触连接、增加散热路径以及缩短散热路程4个方面对功率器件封装结构设计在散热方面未来的发展趋势进行展望。

     

    Abstract: The progress of semiconductor technology has enabled the chip size to be continuously reduced, forcing the development and progress of packaging technology, which has also resulted in a variety of packaging forms. The current design and development of power devices are characterized by the attributes of low inductance, high heat dissipation and high insulation capability, and the development trend of modularity, multi-functionality and compactness in device packaging. To achieve low inductance design of packaged devices, the device package structure is more compact, while the chip voltage level and power density of package modules continue to increase, bringing challenges to package insulation and device heat dissipation. In the limited packaging space, how to release the heat dissipation of the chip to the external environment in a timely and efficient manner to reduce the chip junction temperature and the operating temperature of the internal packaging materials of the device, has become one of the important issues to be considered in the current power device packaging design phase. This paper focuses on the thermal aspects of the power device packaging structures and summarizes the structural design of power semiconductor devices in terms of thermal dissipation. Through the review of domestic and foreign power device packaging structure design, the consideration and thermal characteristics of power device packaging in terms of heat dissipation are summarized, and the types of power device packaging structure are classified according to the heat dissipation characteristics of power devices. Finally, based on the purpose of reducing the thermal resistance of the packaging structure and improving the heat dissipation capability of the device, the future development trend of device packaging structure design in terms of heat dissipation is prospected from four aspects: high thermal conductivity packaging materials and connection process, chip surface contact interconnection, increasing the heat dissipation paths and shortening the heat dissipation distance.

     

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