秦海鸿, 谢斯璇, 卜飞飞, 陈文明, 黄文新. SiC MOSFET栅源电压评估及驱动回路参数优化设计方法[J]. 中国电机工程学报, 2022, 42(18): 6823-6834. DOI: 10.13334/j.0258-8013.pcsee.211880
引用本文: 秦海鸿, 谢斯璇, 卜飞飞, 陈文明, 黄文新. SiC MOSFET栅源电压评估及驱动回路参数优化设计方法[J]. 中国电机工程学报, 2022, 42(18): 6823-6834. DOI: 10.13334/j.0258-8013.pcsee.211880
QIN Haihong, XIE Sixuan, BU Feifei, CHEN Wenming, HUANG Wenxin. Gate-source Voltage Evaluation and Parameter Optimized Designed Method of Driving Circuit for SiC MOSFET[J]. Proceedings of the CSEE, 2022, 42(18): 6823-6834. DOI: 10.13334/j.0258-8013.pcsee.211880
Citation: QIN Haihong, XIE Sixuan, BU Feifei, CHEN Wenming, HUANG Wenxin. Gate-source Voltage Evaluation and Parameter Optimized Designed Method of Driving Circuit for SiC MOSFET[J]. Proceedings of the CSEE, 2022, 42(18): 6823-6834. DOI: 10.13334/j.0258-8013.pcsee.211880

SiC MOSFET栅源电压评估及驱动回路参数优化设计方法

Gate-source Voltage Evaluation and Parameter Optimized Designed Method of Driving Circuit for SiC MOSFET

  • 摘要: 为减少碳化硅(silicon carbide,SiC)金属氧化物半导体场效应管(metal-oxide-semiconductor field-effect transistor,MOSFET)的开关时间和导通电阻以提高效率,通常建议驱动电路采用更低的驱动电阻及更高的驱动电压。但是,由于实际驱动电路中存在寄生参数,过快的开关速度容易产生振荡影响栅极的可靠性,限制SiC MOSFET长期高效安全运行。文中以SiC MOSFET驱动电路为研究对象,分析SiC MOSFET开通瞬态过程,建立考虑电路主要寄生参数的数学模型;定量分析驱动电路参数、主电路寄生参数及工况等影响因素对栅源电压的影响规律;揭示栅源电压、实验测试点电压与驱动电压的区别及影响因素;综合考虑器件应力与损耗,提出一种驱动电路参数优化设计方法。实验结果验证了数学模型与分析的正确性。

     

    Abstract: In order to reduce the switching time and on-resistance of silicon carbide (SiC) based metal-oxide- semiconductor field-effect transistor (MOSFET) to improve the efficiency, it is generally recommended to use lower driving resistance and higher driving voltage. However, due to the parasitic parameters in the driving circuit, excessive switching speed is easy to cause oscillation, which affects the reliability of the gate and limits the efficiency and security of SiC MOSFET. In this paper, the single transistor driving circuit of SiC MOSFET has been taken as the research object, the transient process of turn-on of SiC MOSFET has been analyzed, and the mathematical model considering the main parasitic parameters of the circuit has been established. The influence of driving circuit parameters, main circuit parasitic parameters and operating conditions on gate source voltage has been analyzed quantitatively. The differences and influencing factors of gate source voltage, test point voltage and driving voltage have been analyzed. Finally, combined with the electrical stress and comprehensive loss of SiC MOSFET, an optimized design method of driving circuit parameters has been proposed. Experimental results validate the correctness of the mathematical model and the theoretical analysis.

     

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