Abstract: Press pack injection enhanced gate transistors (PP-IEGTs) parallel multi-chip within the packaging to increase the rating power. However, chips at different locations introduce different parasitic inductors, which leads to inconsistent current distribution between parallel chips, and further causes uneven thermal distribution and chip thermal failure. In order to accurately analyze the effect of parasitic inductors on current sharing among parallel chips, this study extracted the parasitic inductances of single chip module, drive circuit and pillars of the PP-IEGT by using the series resonance, and the inductances were verified based on the S parameter method. The current sharing and electromagnetic characteristics among chips were studied based on the platform of double pulse test. The results show that the parasitic inductance is an important factor to affect the current sharing. The parasitic parameters of the drive circuit are proportional to the length of the gate signal inlet. With the rated power and parallel branches increase, the uneven electrical parameters among chips become more serious. It is helpful to improve the evenness of electromagnetic parameters distribution by changing the gate angle structure of the pillars.