马明, 赵月杭, 易皓. 基于频谱搬移的无锁相环型电压暂降检测方法研究[J]. 供用电, 2021, 38(10): 41-50,56. DOI: 10.19421/j.cnki.1006-6357.2021.10.006
引用本文: 马明, 赵月杭, 易皓. 基于频谱搬移的无锁相环型电压暂降检测方法研究[J]. 供用电, 2021, 38(10): 41-50,56. DOI: 10.19421/j.cnki.1006-6357.2021.10.006
MA Ming, ZHAO Yue-hang, YI Hao. A Voltage Sag Detection Method Based on Spectrum Shift and Non-PLL Techniques[J]. Distribution & Utilization, 2021, 38(10): 41-50,56. DOI: 10.19421/j.cnki.1006-6357.2021.10.006
Citation: MA Ming, ZHAO Yue-hang, YI Hao. A Voltage Sag Detection Method Based on Spectrum Shift and Non-PLL Techniques[J]. Distribution & Utilization, 2021, 38(10): 41-50,56. DOI: 10.19421/j.cnki.1006-6357.2021.10.006

基于频谱搬移的无锁相环型电压暂降检测方法研究

A Voltage Sag Detection Method Based on Spectrum Shift and Non-PLL Techniques

  • 摘要: 电压暂降作为影响最大的电能质量问题之一,严重威胁着现代制造、公共服务等产业的正常运转。电压暂降事件的快速准确检测是暂降治理的重要环节。传统的基于单同步坐标系锁相环与瞬时d-q分解的电压暂降检测算法,无法对包含负序、谐波分量的电网电压进行准确、快速检测。提出并详细研究以估算参考相位Park坐标变换为基础的电压频谱搬移过程,并借助离散滑动平均滤波对电网电压进行有效分量的提取,以此实现无锁相环下含负序与谐波分量的电压暂降快速准确检测。该方法结构简单、适应性强、节省芯片算力,避免了暂降瞬间锁相环动态过程造成的检测延时,也可实现电压特定次谐波分量的快速提取。基于仿真平台PLECS的仿真结果与RT Box的硬件在环实验,验证了所提算法的有效性、快速性和简洁性。以广东某电子工业园电压暂降防治为背景的10 kV快速切换开关装置从工程上验证了本算法的可靠性。

     

    Abstract: Voltage sag, as one of the greatest power quality problems, has been seriously threatening the operation of modern industry and public services. The fast and accurate detection of voltage transient events is an important part of transient drop management. Traditional sag detection algorithm based on single synchronous reference frame phase-locked loop and instantaneous d-q decomposition cannot give an accurate and fast detection on grid voltage containing negative sequence and harmonic components. We propose and study in detail the voltage spectrum shifting process based on the Park coordinate transformation of the estimated reference phase, and extract the effective components of the grid voltage with the help of discrete sliding average filtering, so as to realize the fast and accurate detection of voltage transients with negative sequence and harmonic components without phase locking loop. The proposed method is simple and adaptable, it can save chip computing power and avoid the detection delay caused by dynamic process of PLL during voltage sag, also realize a rapid extraction of harmonic components in specific order. Simulation and HIL experiments based on PLECS and RT Box have verified the effectiveness, quickness and simplicity of proposed algorithm. The reliability of proposed algorithm has been further verified by a 10 kV dual power fast switches device with the background of voltage sag prevention in an electronics industrial park in Guangdong, China.

     

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