Abstract:
With the increasing market of silicon carbide metal-oxide-silicon field effect transistor (SiC MOSFET), the need of the fast and accurate device model for circuit simulation is continuously growing. However, the existing models have several limitations, including the trade-off between the high accuracy of
I-
U characteristic and high convergency, as well as the large deviation of Miller capacitance modeling in the low drain-source voltage
UDS region. In order to address these issues, a datasheet-driven SiC MOSFET model considering multi-layer depletion of miller capacitance is proposed. First, the current source model from literature is revised based on the non-segmented functions, which improves the accuracy of
I-
U characteristic. Then, based on the analysis of the multi-layer depletion process, a novel miller capacitance model is proposed, which covers the
C-
U characteristic in the whole
UDS range. The model parameters can be fully extracted through the datasheet, according to the proposed methods and procedures. Moreover, the influence of parameter variation on the dynamic waveforms is analyzed in detail. A commercial SiC MOSFET C3M0021120D is used to study the effectiveness of the proposed model. The static tests and dynamic double pulse tests are conducted, and the results are compared to the simulation results on the platform of LTspice. The results show that the maximum prediction error of the proposed model is within 10%, which proves the validity of the proposed model and implies that this model has great potentials in SiC-based power electronics converter design and evaluation applications.