王乐衡, 孙凯, 郑泽东, 李驰, 巫以凡, 毕大强. 考虑米勒电容分层耗尽的数据手册驱动型SiC MOSFET模型[J]. 高电压技术, 2025, 51(2): 876-889. DOI: 10.13336/j.1003-6520.hve.20231640
引用本文: 王乐衡, 孙凯, 郑泽东, 李驰, 巫以凡, 毕大强. 考虑米勒电容分层耗尽的数据手册驱动型SiC MOSFET模型[J]. 高电压技术, 2025, 51(2): 876-889. DOI: 10.13336/j.1003-6520.hve.20231640
WANG Leheng, SUN Kai, ZHENG Zedong, LI Chi, WU Yifan, BI Daqiang. Datasheet-driven SiC MOSFET Model Considering Multi-layer Depletion of Miller Capacitance[J]. High Voltage Engineering, 2025, 51(2): 876-889. DOI: 10.13336/j.1003-6520.hve.20231640
Citation: WANG Leheng, SUN Kai, ZHENG Zedong, LI Chi, WU Yifan, BI Daqiang. Datasheet-driven SiC MOSFET Model Considering Multi-layer Depletion of Miller Capacitance[J]. High Voltage Engineering, 2025, 51(2): 876-889. DOI: 10.13336/j.1003-6520.hve.20231640

考虑米勒电容分层耗尽的数据手册驱动型SiC MOSFET模型

Datasheet-driven SiC MOSFET Model Considering Multi-layer Depletion of Miller Capacitance

  • 摘要: 随着碳化硅金属-氧化物-半导体场效应管(silicon carbide metal-oxide-silicon field effect transistor, SiC MOSFET)功率器件的市场规模逐渐增大,对快速、准确的SiC MOSFET器件电路仿真模型的需求持续增多。然而,现有的SiC MOSFET模型尚不完善,无法兼顾电流-电压特性的高准确度和高收敛性,且对米勒电容在低漏源电压区域的变化特性建模存在较大误差。为此,提出了一种考虑米勒电容分层耗尽的数据手册驱动型SiC MOSFET模型。首先,在已有文献中不分段电流源模型的基础上,修正模型表达式,提高了电流-电压特性准确度。接着,基于对米勒电容分层耗尽特性物理过程的分析,建立了优化的米勒电容模型以描述全偏压下的电容-电压特性。模型参数可以完全通过数据手册按照参数提取方法和步骤提取,并分析了静态参数变化对动态特性产生影响的机制。最后,以SiC MOSFET器件C3M0021120D为研究对象,在LTspice中搭建器件模型和仿真电路,并与静态特性测试及双脉冲动态特性测试结果进行对比。实验结果表明:所提模型的预测误差均在10%以内,验证了所提模型的有效性,体现了该模型具有被应用于碳化硅电力电子变换器设计与评估的潜力。

     

    Abstract: With the increasing market of silicon carbide metal-oxide-silicon field effect transistor (SiC MOSFET), the need of the fast and accurate device model for circuit simulation is continuously growing. However, the existing models have several limitations, including the trade-off between the high accuracy of I-U characteristic and high convergency, as well as the large deviation of Miller capacitance modeling in the low drain-source voltage UDS region. In order to address these issues, a datasheet-driven SiC MOSFET model considering multi-layer depletion of miller capacitance is proposed. First, the current source model from literature is revised based on the non-segmented functions, which improves the accuracy of I-U characteristic. Then, based on the analysis of the multi-layer depletion process, a novel miller capacitance model is proposed, which covers the C-U characteristic in the whole UDS range. The model parameters can be fully extracted through the datasheet, according to the proposed methods and procedures. Moreover, the influence of parameter variation on the dynamic waveforms is analyzed in detail. A commercial SiC MOSFET C3M0021120D is used to study the effectiveness of the proposed model. The static tests and dynamic double pulse tests are conducted, and the results are compared to the simulation results on the platform of LTspice. The results show that the maximum prediction error of the proposed model is within 10%, which proves the validity of the proposed model and implies that this model has great potentials in SiC-based power electronics converter design and evaluation applications.

     

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