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Optimized Design in Current, Temperature and Stress Distributions for Paralleled Chips in Press-Pack IGBT Modules
Regular Papers | 更新时间:2026-10-16
    • Optimized Design in Current, Temperature and Stress Distributions for Paralleled Chips in Press-Pack IGBT Modules

    • CSEE Journal of Power and Energy Systems   Vol. 11, Issue 5, Pages: 2325-2338(2025)
    • DOI:10.17775/CSEEJPES.2021.06360    

      CLC:
    • Published:01 September 2025

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  • Lubin Han, Lin Liang, Yong Kang. Optimized Design in Current, Temperature and Stress Distributions for Paralleled Chips in Press-Pack IGBT Modules[J]. CSEE Journal of Power and Energy Systems, 2025, 11(5): 2325-2338. DOI: 10.17775/CSEEJPES.2021.06360.

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