Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems
Regular Papers|更新时间:2026-10-15
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Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems
CSEE Journal of Power and Energy SystemsVol. 9, Issue 5, Pages: 1720-1731(2023)
作者机构:
Hubei Key Laboratory of Advanced Control and Intelligent Automation for Complex Systems, School of Automation, China University of Geosciences,Wuhan,China
Qingyi Wang, Binlei Ju, Yudi Lei, et al. Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems[J]. CSEE Journal of Power and Energy Systems, 2023, 9(5): 1720-1731.
DOI:
Qingyi Wang, Binlei Ju, Yudi Lei, et al. Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems[J]. CSEE Journal of Power and Energy Systems, 2023, 9(5): 1720-1731.DOI: 10.17775/CSEEJPES.2021.01560.
Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems