Stability analysis of PLL influenced by control loops in grid-connected converters under fault disturbance

Yushuang Liu; Meng Huang; Xiaoming Zha; Herbert Ho-Ching Iu

doi:10.17775/CSEEJPES.2019.02760

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Stability analysis of PLL influenced by control loops in grid-connected converters under fault disturbance

更新时间：2025-12-18

- Stability analysis of PLL influenced by control loops in grid-connected converters under fault disturbance
- CSEE Journal of Power and Energy Systems Vol. 6, Issue 2, Pages: 239-248(2020)
- 作者机构：
  
  1. School of Electrical Engineering and Automation, Wuhan University,Wuhan,China
  2. School of Electrical, Electronic and Computer Engineering, University of Western Australia, Crawley,WA,Australia
- 作者简介：
- 基金信息：
- DOI：10.17775/CSEEJPES.2019.02760
  CLC：
- Published：2020
- 稿件说明：
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Yushuang Liu, Meng Huang, Xiaoming Zha, et al. Stability analysis of PLL influenced by control loops in grid-connected converters under fault disturbance[J]. CSEE Journal of Power and Energy Systems, 2020, 6(2): 239-248.
DOI：

Yushuang Liu, Meng Huang, Xiaoming Zha, et al. Stability analysis of PLL influenced by control loops in grid-connected converters under fault disturbance[J]. CSEE Journal of Power and Energy Systems, 2020, 6(2): 239-248. DOI： 10.17775/CSEEJPES.2019.02760.

摘要

Abstract

When the power grid suffers from grid faults that cause phase disturbances

the grid-connected converter becomes destabilized by the interaction between the phase-locked loop (PLL) and the control loop. In this paper

the stability of the PLL affected by the control loop under transient grid faults is studied. First

the equivalent model of the PLL under the influence of the control loop is established. Then

different response processes of PLLs under the ground fault with various control parameters are qualitatively analyzed. Furthermore

a small-signal model is proposed to assess the stability of the PLL under different control loop parameters. The system poles can be calculated to show the physical origin of the instability. Finally

simulations of a three-phase 21-level modular multilevel converter (MMC) built in PSCAD and a down-scale experiment is performed to verify the parameter influence of the control loop on the PLL.

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