XIANG Pengfei, HAO Ruixiang, WANG Deshun, et al. Collaborative optimization of switching performance and gate reliability for SiC MOSFET under voltage-source gate driver[J]. 2025, 29(5).
DOI:
XIANG Pengfei, HAO Ruixiang, WANG Deshun, et al. Collaborative optimization of switching performance and gate reliability for SiC MOSFET under voltage-source gate driver[J]. 2025, 29(5). DOI: 10.15938/j.emc.2025.05.014.
Collaborative optimization of switching performance and gate reliability for SiC MOSFET under voltage-source gate driver
To fully develop the switching performance and gate reliability of SiC MOSFET under the voltage source gate driver with fixed parameters
the gate parameters design scheme was optimized. The switching behavior of SiC MOSFET as the active device and the crosstalk behavior as the passive device were theoretically analyzed. The effects of different passive parameters on the switching performance and crosstalk behavior of each stage during the switching process were compared. The collaborative gate parameter optimization scheme was proposed. Then
the effect of the optimized gate parameters was verified by experiments. The optimized gate parameters can not only reduce the switching loss by up to 30% as the active device but also reduce the crosstalk peak-to-peak value by up to 60% as the passive device under the premise of the same overvoltage stress during the turn-off process. The collaborative optimization of the device switching performance and gate reliability under the voltage source gate driver was realized.