In view of the problems of PV storage DC microelectronics that are affected by uncertain disturbances such as PV resource fluctuations and load-side fluctuations

which cause DC bus voltage instability

this paper is based on the traditional active disturbance rejection control (ADRC); meanwjhile

an upgraded active disturbance rejection control with dynamic coordination of parameters (DCLADRC) is proposed

two new observed variables are introduced

and the 1D bandwidth parameter is added. The aim is to improve the observation accuracy and convergence speed of the observer under multi-frequency domain disturbance

to optimize the immunity of the controller

and to enhance the stability of the bus voltage by dynamically adjusting the coordination factor k between the two-stage bandwidth

so that the energy storage can better play the regulating role of "peak shaving and valley filling". The results show that

after being disturbed

the proportional integral control of LADRC and double closed-loop (Double_PI) is compared

The proposed DCLADRC voltage offset is reduced by 75% and 83%

respectively.