LI Guoqiang, XIE Zhen, GUO Gengchen, et al. Power Sharing of DFIG in Islanded Microgrids Based on VIVC Algorithm[J]. 2025, (22): 8968-8982.
DOI:
LI Guoqiang, XIE Zhen, GUO Gengchen, et al. Power Sharing of DFIG in Islanded Microgrids Based on VIVC Algorithm[J]. 2025, (22): 8968-8982. DOI: 10.13334/j.0258-8013.pcsee.242907.
Power Sharing of DFIG in Islanded Microgrids Based on VIVC Algorithm
随着风电渗透率的持续攀升,跟网型双馈风电机组(doubly fed induction generator,DFIG)的稳定性会有所不足,构网型DFIG凭借其出色的电压与频率支撑能力成为了当下研究的热点。在多台构网型DFIG并联运行的微网场景下,由于各线路间阻抗存在差异,导致负载的无功功率难以实现均匀分配。针对该问题,将传统的虚拟阻抗(virtual impedance,VI)算法应用于微网DFIG中,分析表明,VI算法在提升无功均分精度同时会伴随着电压控制精度的下降;为了优化VI算法的控制性能,进一步提出虚拟阻抗与虚拟电容(virtual impedance and virtual capacitance,VIVC)相结合的新型算法,相较于VI算法,所提出的VIVC算法能够在基本保持其功率均分精度的情况下,实现电压控制精度8.6%的显著提升;此外,还分析所提算法对系统稳定性和动态响应性能的影响;最后,通过硬件在环平台验证所提策略的有效性及分析过程的正确性。
Abstract
With the continuous increase in wind power penetration
the stability of grid-following doubly-fed induction generator (DFIG) wind turbines has become insufficient. Grid-forming DFIG wind turbines
with their outstanding voltage and frequency support capabilities
have become a research hotspot. In the microgrid scenario with multiple grid-forming DFIGs operating in parallel
differences in line impedance make it difficult to achieve uniform reactive power distribution among loads. To address this issue
this paper applies the traditional virtual impedance (VI) algorithm to the microgrid DFIGs. Analytical results demonstrate that the implementation of the VI algorithm improves the precision of reactive power sharing at the expense of reduced voltage control accuracy. To optimize the control performance of the VI algorithm
this paper further proposes a novel algorithm combining virtual impedance and virtual capacitance (VIVC). Compared with the VI algorithm
the proposed VIVC algorithm achieves a remarkable 8.6% improvement in voltage control accuracy while maintaining comparable power sharing precision. Additionally
the impact of the proposed algorithm on system stability and dynamic response performance is analyzed. Finally
the proposed strategy and the analysis process are validated on a hardware-in-the-loop platform.