Surge is an extreme condition that silicon carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFETs) usually face during operation

leading to device failure. The surge safe operating area (SOA) is a critical parameter for evaluating the reliability of SiC MOSFETs. However

existing methods for assessing surge SOA are predominantly based on extensive destructive testing

leading to substantial costs and inefficiencies. Therefore

this study proposes a cost-effective methodology for evaluating the surge SOA of SiC MOSFETs. Initially

a finite element model is developed to calculate the temperature distribution within the SiC MOSFETs. Subsequently

the proper orthogonal decomposition (POD) algorithm is employed to reduce the computational complexity of this model

resulting in a reduced-order model. Utilizing this reduced-order model

a thermal network model is constructed

incorporating the impact of temperature on the network parameters. Next

a circuit model of the SiC MOSFET body diode is developed and integrated with the thermal network model to establish an electrothermal coupling model. This comprehensive model facilitates the generation of datasets corresponding to various surge conditions and SiC MOSFET temperatures. The Kriging surrogate model is introduced

mapping the relationship between surge conditions and temperature

thereby enabling a rapid and precise evaluation of the surge SOA. Finally

a destructive surge test is conducted to validate the effectiveness of the proposed surge SOA evaluation method.