Dynamic reconfiguration for TEG systems under heterogeneous temperature distribution via adaptive coordinated seeker

Yijun Chen; Bo Yang; Zhengxun Guo; Jingbo Wang; Mengmeng Zhu; Zilin Li; Tao Yu

doi:10.1186/s41601-022-00259-6

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Dynamic reconfiguration for TEG systems under heterogeneous temperature distribution via adaptive coordinated seeker

Original Research | 更新时间：2026-09-30

- Dynamic reconfiguration for TEG systems under heterogeneous temperature distribution via adaptive coordinated seeker
- Protection and Control of Modern Power Systems Vol. 7, Issue 3, Pages: 1-18(2022)
- 作者机构：
  
  1. Faculty of Electric Power Engineering, Kunming University of Science and Technology,Kunming,China
  2. Electric Power Research Institute of Yunnan Power Grid Co., Ltd,Kunming,China
  3. Department of Electrical Engineering, Hong Kong Polytechnic University,Hong Kong SAR,China
  4. College of Electric Power, South China University of Technology,Guangzhou,China
- 作者简介：
- 基金信息：
- DOI：10.1186/s41601-022-00259-6
  CLC：
- Published：01 July 2022
- 稿件说明：
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Yijun Chen, Bo Yang, Zhengxun Guo, et al. Dynamic reconfiguration for TEG systems under heterogeneous temperature distribution via adaptive coordinated seeker[J]. Protection and Control of Modern Power Systems, 2022, 7(3): 1-18.
DOI：

Yijun Chen, Bo Yang, Zhengxun Guo, et al. Dynamic reconfiguration for TEG systems under heterogeneous temperature distribution via adaptive coordinated seeker[J]. Protection and Control of Modern Power Systems, 2022, 7(3): 1-18. DOI： 10.1186/s41601-022-00259-6.

摘要

A thermoelectric generation (TEG) system has the weakness of relatively low thermoelectric conversion efficiency caused by heterogeneous temperature distribution (HgTD). Dynamic reconfiguration is an effective technique to improve its overall energy efficiency under HgTD. Nevertheless

numerous combinations of electrical switches make dynamic reconfiguration a complex combinatorial optimization problem. This paper aims to design a novel adaptive coordinated seeker (ACS) based on an optimal configuration strategy for large-scale TEG systems with series-parallel connected modules under HgTDs. To properly balance global exploration and local exploitation

ACS is based on ‘divide-and-conquer’ parallel computing

which synthetically coordinates the local searching capability of tabu search (TS) and the global searching capability of a pelican optimization algorithm (POA) during iterations. In addition

an equivalent re-optimization strategy for a reconfiguration solution obtained by meta-heuristic algorithms (MhAs) is proposed to reduce redundant switching actions caused by the randomness of MhAs. Two case studies are carried out to assess the feasibility and superiority of ACS in comparison with the artificial bee colony algorithm

ant colony optimization

genetic algorithm

particle swarm optimization

simulated annealing algorithm

and POA. Simulation results indicate that ACS can realize fast and stable dynamic reconfiguration of a TEG system under HgTDs. In addition

RTLAB platform-based hardware-in-the-loop experiments are carried out to further validate the hardware implementation feasibility.

Abstract

numerous combinations of electrical switches make dynamic reconfiguration a complex combinatorial optimization problem. This paper aims to design a novel adaptive coordinated seeker (ACS) based on an optimal configuration strategy for large-scale TEG systems with series–parallel connected modules under HgTDs. To properly balance global exploration and local exploitation

ACS is based on ‘divide-and-conquer’ parallel computing

which synthetically coordinates the local searching capability of tabu search (TS) and the global searching capability of a pelican optimization algorithm (POA) during iterations. In addition

ant colony optimization

genetic algorithm

particle swarm optimization

simulated annealing algorithm

and POA. Simulation results indicate that ACS can realize fast and stable dynamic reconfiguration of a TEG system under HgTDs. In addition

RTLAB platform-based hardware-in-the-loop experiments are carried out to further validate the hardware implementation feasibility.

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