Output Voltage Robust Controller Design for the Power Converter System in the Assembled VSG
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Graphical Abstract
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Abstract
The interactive stability of the front-end dc-dc converter and the rear-end virtual synchronous generator (VSG) is critical for the assembled energy storage VSG to reliably supply the auxiliary services such as frequency regulation, voltage regulation, and so on. In order to ensure that the energy storage interface converter operates stably throughout the entire working conditions when connected with the VSG with unknown control parameters, this paper proposes a design of the output voltage robust PI controller parameters for the front-end converter. There are three steps in this design. Step 1: The stable region of the output voltage PI parameters is calculated when the front-end converter has an ideal current source load. Step 2: Regarding the VSG as a constant power load, the closed-loop input impedance of the VSG (i.e. negative resistance, Req) under the maximum load and the closed-loop output impedance of the front-end converter Zoc(s) under the minimum load are determined. Step 3: the output voltage PI parameter region is obtained which satisfies the impedance constraint (|Zoc(s)| < |Req|). The parameters in the overlap part of these two stable regions can ensure the robust cascade stability. The correctness of the design is verified with a 10kVA simulation model.
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