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CAO Hong, ZHOU Zexin, LIU Huanzhang, ZHANG Zhi, WANG Xingguo, DU Dingxiang, LI Yong, JIN Mingliang. Principle of Pseudo-synchronous Differential Protection Based on Sudden Current Accumulation for HVDC Transmission Lines[J]. Power System Technology, 2022, 46(1): 70-80. DOI: 10.13335/j.1000-3673.pst.2021.0066
Citation: CAO Hong, ZHOU Zexin, LIU Huanzhang, ZHANG Zhi, WANG Xingguo, DU Dingxiang, LI Yong, JIN Mingliang. Principle of Pseudo-synchronous Differential Protection Based on Sudden Current Accumulation for HVDC Transmission Lines[J]. Power System Technology, 2022, 46(1): 70-80. DOI: 10.13335/j.1000-3673.pst.2021.0066

Principle of Pseudo-synchronous Differential Protection Based on Sudden Current Accumulation for HVDC Transmission Lines

  • In order to solve the problem that it needs a long time(usu. second level) for the HVDC transmission line traditional current differential protection to operate, a new principle of pseudo-synchronous differential protection based on the sudden current accumulation for the HVDC transmission lines is presented in this paper. By analyzing the characteristics of the current sudden changes at both sides under the internal and external fault conditions, the sudden current accumulation is proposed to effectively identify the directions of the current sudden changes. By constructing the action current and the braking current with the sudden current accumulations at both sides, the novel principle of DC differential protection is proposed and the pseudo- synchronization algorithm is put forward to further shorten the protection operation time. In addition, comparing the timing relationships between the current data at both sides under the pseudo-synchronization and the synchronization algorithms, the superiority of the pseudo-synchronization algorithm is further analyzed. The RTDS simulation results show that the new protection proposed has higher speed and sensitivity. Considering the channel delay with 20ms, the protection operation time is not more than 20ms when an internal ground fault occurs, and it is not more than 27.6ms when an internal fault with high resistance (up to 800Ω) occurs. No compensation of the distributed capacitor current and no precise data synchronization at the two ends needed, the algorithm requires a small calculation and a lower data sampling rate, which is strongly practicable in engineering.
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