陶彩霞, 王文博, 李泰国, 张建刚. 基于电容换流的限流型混合式直流断路器[J]. 电网技术, 2023, 47(12): 5138-5146. DOI: 10.13335/j.1000-3673.pst.2022.2010
引用本文: 陶彩霞, 王文博, 李泰国, 张建刚. 基于电容换流的限流型混合式直流断路器[J]. 电网技术, 2023, 47(12): 5138-5146. DOI: 10.13335/j.1000-3673.pst.2022.2010
TAO Caixia, WANG Wenbo, LI Taiguo, ZHANG Jiangang. Current Limiting Hybrid DC Circuit Breaker Based on Capacitor Commutation[J]. Power System Technology, 2023, 47(12): 5138-5146. DOI: 10.13335/j.1000-3673.pst.2022.2010
Citation: TAO Caixia, WANG Wenbo, LI Taiguo, ZHANG Jiangang. Current Limiting Hybrid DC Circuit Breaker Based on Capacitor Commutation[J]. Power System Technology, 2023, 47(12): 5138-5146. DOI: 10.13335/j.1000-3673.pst.2022.2010

基于电容换流的限流型混合式直流断路器

Current Limiting Hybrid DC Circuit Breaker Based on Capacitor Commutation

  • 摘要: 直流断路器是直流电网线路故障切除的重要装置,为提高直流电网在直流故障下运行的可靠性,针对断路器开断能力的高要求及成本较高、限流能力不强、故障隔离速度慢等问题,提出一种基于电容换流的限流型混合式直流断路器(capacitor commutation,current-limited hybrid DC circuit breaker,CC-CL-DCCB)拓扑,所提方案有正常及故障两种工作模式,依靠电容反向充电及阻感限流支路综合限流,有效抑制故障电流增长,使断路器跳闸时故障电流降低至3.71kA。所提方案具备故障清除后的重合闸判定能力,设有使电感短路及电容自然再放电的二极管组,可缩减故障隔离时间1.6ms,并降低避雷器吸收能量18.44MJ。对所提断路器拓扑进行了原理解析及理论推导,并在PSCAD/EMTDC中将其应用于四端直流电网进行仿真分析,与现有的直流故障保护方案进行性能及经济性对比分析,结果表明所提断路器具备一定优越性及可行性。

     

    Abstract: DC circuit breaker is an important device for the DC power grid fault removal. In order to improve the reliability of the DC grid operation under a DC fault, a capacitor commutation (Current-limited hybrid DC circuit breaker (CC-CL-DCCB) topology based on capacitor commutation is proposed in view of the high requirements of the breaker's breaking capacity and its high cost, weak current limiting capacity, slow fault isolation speed and other problems. Having the normal and the fault operating modes, the proposed scheme relies on the comprehensive current limiting of the capacitor reverse charging and the resistive inductive current limiting branch, effectively suppressing the rise of the fault current and reducing the fault current to 3.71kA when the tripping occurs. In addition, it is able to reclose after the fault clearance. It has the diode set which may cause a short circuit for the inductor and a natural discharge for the capacitor, which effectively reduces 1.6 ms in the fault isolation time and 18.44MJ in the energy absorbed by the arrester. The principle analysis and theoretical derivation of the proposed circuit breaker and the simulation analysis in PSCAD/EMTDC show that the proposed circuit breaker topology is applied to the four-terminal DC power grid. Compared with the existing DC fault protection schemes, the proposed circuit breaker has a certain advantages and feasibility.

     

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