董海涛, 陈光胜, 王晓辉, 吴强. 低功耗和高可靠蓝牙5.0 SoC芯片设计[J]. 电力信息与通信技术, 2021, 19(1): 98-104. DOI: 10.16543/j.2095-641x.electric.power.ict.2021.01.013
引用本文: 董海涛, 陈光胜, 王晓辉, 吴强. 低功耗和高可靠蓝牙5.0 SoC芯片设计[J]. 电力信息与通信技术, 2021, 19(1): 98-104. DOI: 10.16543/j.2095-641x.electric.power.ict.2021.01.013
DONG Haitao, CHEN Guangsheng, WANG Xiaohui, WU Qiang. Design of Low-Power and High-Reliability BT5.0 SoC[J]. Electric Power Information and Communication Technology, 2021, 19(1): 98-104. DOI: 10.16543/j.2095-641x.electric.power.ict.2021.01.013
Citation: DONG Haitao, CHEN Guangsheng, WANG Xiaohui, WU Qiang. Design of Low-Power and High-Reliability BT5.0 SoC[J]. Electric Power Information and Communication Technology, 2021, 19(1): 98-104. DOI: 10.16543/j.2095-641x.electric.power.ict.2021.01.013

低功耗和高可靠蓝牙5.0 SoC芯片设计

Design of Low-Power and High-Reliability BT5.0 SoC

  • 摘要: 为满足近距离无线通信需求,实现各种信息终端的智能互联,文章采用40 nm eFlash CMOS工艺,设计了一款符合蓝牙5.0协议的系统级芯片(System on a Chip,SoC)。在设计过程中,针对SoC芯片的结构,提出了电源管理、时钟、存储及射频模拟电路等主要功能模块的设计方法;为了提高系统的稳定性,提出了高可靠电路设计方法。最终采用系统级封装(System in a Package,SiP)方案,拓展了芯片的物联网应用场景。测试结果表明,该芯片能够满足低功耗、高可靠无线通信系统的应用需求。

     

    Abstract: To meet the requirement of close-range wireless communication and realize the intelligent interconnection of various information terminals, a SoC chip with Bluetooth 5.0 protocol is designed by using 40 nm eFlash CMOS technology. During the design process, the design method of the main functional modules of the system, such as power management, clock, storage and RF circuit, is studied based on the structure of the SoC chip. In order to improve the stability of the system, this paper presents a design method of high reliability circuit. Finally, the SiP system-level package scheme is adopted to expand the application scene of the Internet of things of the chip. The test results show that the chip can meet the application requirements of low power consumption and high reliability wireless communication system.

     

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