高晨祥, 林丹颖, 韩林洁, 冯谟可, 许建中, 李彬彬. 双有源桥型电力电子变压器电磁暂态实时低耗等效模型[J]. 电力系统自动化, 2024, 48(8): 195-206.
引用本文: 高晨祥, 林丹颖, 韩林洁, 冯谟可, 许建中, 李彬彬. 双有源桥型电力电子变压器电磁暂态实时低耗等效模型[J]. 电力系统自动化, 2024, 48(8): 195-206.
GAO Chenxiang, LIN Danying, HAN Linjie, FENG Moke, XU Jianzhong, LI Binbin. Electromagnetic Transient Real-time Low-consumption Equivalent Model of Dual Active Bridge Based Power Electronic Transformer[J]. Automation of Electric Power Systems, 2024, 48(8): 195-206.
Citation: GAO Chenxiang, LIN Danying, HAN Linjie, FENG Moke, XU Jianzhong, LI Binbin. Electromagnetic Transient Real-time Low-consumption Equivalent Model of Dual Active Bridge Based Power Electronic Transformer[J]. Automation of Electric Power Systems, 2024, 48(8): 195-206.

双有源桥型电力电子变压器电磁暂态实时低耗等效模型

Electromagnetic Transient Real-time Low-consumption Equivalent Model of Dual Active Bridge Based Power Electronic Transformer

  • 摘要: 电力电子变压器(PET)是柔性直流配电网中电能变换的关键设备。受仿真资源限制,现有PET电磁暂态(EMT)实时仿真规模较小,无法满足大容量系统硬件在环测试与快速仿真需求。文中提出一种双有源桥(DAB)型PET实时低耗等效建模算法。首先,深入挖掘了DAB高频链端口解耦模型的二值输入导纳特性,并从数值分析与物理意义两个层面进行了阐述。以此为基础,构建了具有N+1特性的PET高频链端口解耦模型。其次,提出了基于有限存储的低内存占用EMT解算方案、紧凑型低延时仿真框架、分组并行流水线计算硬件实现方案,降低了所提等效模型在实时仿真中对存储内存、计算时钟和硬件资源的需求。最后,在RT-LAB中完成了基于Verilog语言的250 ns实时低耗等效仿真模型开发,并进行了所建模型仿真精度和资源利用率测试。

     

    Abstract: Power electronic transformers(PETs) are key devices for power conversion in flexible DC distribution networks. Due to the limitation of simulation resources, the scales of existing electromagnetic transient(EMT) real-time simulations for PETs are small, which can not meet the demand of hardware-in-loop test and fast simulation for the large-capacity system. This paper proposes a real-time low-consumption equivalent modeling algorithm for dual active bridge(DAB) based PETs. Firstly, the binary input admittance characteristics of the high-frequency link port decoupling model(HFL-PDM) of the DAB are deeply explored and elaborated from the perspective of numerical analysis and physical significance. Based on this, the HFL-PDM of the PET with the N+1 characteristics is constructed. Secondly, a low-memory-occupancy EMT solution scheme using limited storage, a compact low-latency simulation framework, and a hardware implementation scheme using packet-based parallel pipeline computing are designed, which reduce the demand for the storage memory, the computing clock, and the hardware resource during the realtime simulation. Finally, the real-time low-consumption equivalent simulation model at a time step of 250 ns is developed based on Verilog language in RT-LAB. The simulation accuracy and resource utilization of the established model are tested.

     

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